Motorola MVME2700 Series Servisní příručka stáhnout pdf (Strana 89)

Memory Maps

http://www.motorola.com/computer/literature 2-5

Default Processor Memory Map

The default processor memory map that is valid at power-up or reset

remains in effect until reprogrammed for specific applications. Table 2-2

defines the entire default map ($00000000 to $FFFFFFFF).

Notes

1. Default map for PCI/ISA I/O space. Allows software to determine

whether the system is MPC105-based or Falcon/Raven-based by

examining either the PHB Device ID or the CPU Type register.

2. The first 1MB of ROM/Flash bank A (socketed 1MB ROM/Flash)

appears in this range after a reset if the rom_b_rv control bit in the

Falcon’s ROM B Base/Size register is cleared. If the rom_b_rv

control bit is set, this address range maps to ROM/Flash bank B

(soldered 4MB or 8MB ROM/Flash).

For detailed processor memory maps, including suggested CHRP- and

PREP-compatible memory maps, refer to the MVME2600/2700 Series

Single Board Computer Programmer’s Reference Guide.

Table 2-2. Processor Default View of the Memory Map

Processor Address Size Definition Notes

Start End

00000000 7FFFFFFF 2GB Not Mapped

80000000 8001FFFF 128KB PCI/ISA I/O Space 1

80020000 FEF7FFFF 2GB-16MB-

640KB

Not Mapped

FEF80000 FEF8FFFF 64KB Falcon Registers

FEF90000 FEFEFFFF 384KB Not Mapped

FEFF0000 FEFFFFFF 64KB Raven Registers

FF000000 FFEFFFFF 15MB Not Mapped

FFF00000 FFFFFFFF 1MB ROM/Flash Bank A or

Bank B

1 2 ... 84 85 86 87 88 89 90 91 92 93 94 ... 214 215

Žádné komentáře

Motorola MVME2700 Series Servisní příručka Strana 89