Motorola M68CPU32BUG Uživatelský manuál Strana 36
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DEBUG MONITOR COMMANDS
M68CPU32BUG/D REV 1 3-40
MD Memory Display MD
3.19 MEMORY DISPLAY
MD[S] <addr>[:<count>|<addr>][; [B|W|L|DI]]
Use the MD command to display the contents of multiple memory locations. MD accepts the
following data types:
Integer Data Type
B – Byte
W – Word
L – Longword
The default data type is word (W). Integer data types are always displayed in both hex and
ASCII. The DI option enables the resident MCU disassembler. No other option is allowed if DI is
selected.
The optional count argument in the MD command specifies the number of data items to be
displayed, or the number of disassembled instructions to display if the disassembly option is
selected. The default is 8 if no value for <count> is entered. The default count is changed to 128
if the S (sector) modifier is used. After the command has completed, enter <CR> at the prompt
to re-execute the command and display the same number of lines of data beginning at the next
address.
EXAMPLES
CPU32Bug>md C000<CR>
0000C000 2800 1942 2900 1942 2800 1842 2900 2846 (..B)..B(..B).(F
CPU32Bug><CR>
0000C010 FC20 0050 ED07 9F61 FF00 000A E860 F060 1..Pm..a....h’p’
Assume the following processor state: A2=00003500, D5=00000127.
CPU32Bug>md (a2,d5):&19;b<CR>
00003627 4F82 00C5 9B10 337A DF01 6C3D 4B50 0F0F 0..E..3z_.l=KP..
00003637 31AB 80 1+.
CPU32Bug>
DEBUG MONITOR COMMANDS
M68CPU32BUG/D REV 1 3-41
MD Memory Display MD
CPU32Bug>md 5008;di<CR>
00005008 46FC2700 MOVE.W #$2700,SR
0000500C 61FF0000023E BSR.L #$524C
00005012 4E7AD801 MOVEC.L VBR,A5
00005016 41ED7FFC LEA.L $7FFC(A5),A0
0000501A 5888 ADDQ.L #$4,A0
0000501C 2E48 MOVE.L A0,A7
0000501E 2C48 MOVE.L A0,A6
00005020 13C7FFFB003A MOVE.B D7,($FFFB003A).L
CPU32Bug>
NOTE
If the address location requested is not displayed, the automatic
offset register is non-zero and has been added to the address. See
the offset (OF) command.
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
- M68CPU32BUG DEBUG MONITOR 1
- USER’S MANUAL 1
- M68CPU32BUG/D 1
- TABLE OF CONTENTS 2
- LIST OF FIGURES 3
- LIST OF TABLES 3
- 1.5 SYSTEM RESTART 5
- CHAPTER 1 5
- GENERAL INFORMATION 5
- 1.1 INTRODUCTION 5
- 1.2 GENERAL DESCRIPTION 5
- 1.3 USING THIS MANUAL 6
- 1.6 MEMORY REQUIREMENTS 7
- CHAPTER 2 9
- DEBUG MONITOR DESCRIPTION 9
- 2.1 INTRODUCTION 9
- Freescale Semiconductor, Inc 10
- 2.6 FUNCTION CODE SUPPORT 13
- CHAPTER 3 16
- DEBUG MONITOR COMMANDS 16
- 3.1 INTRODUCTION 16
- BC Block of Memory Compare BC 17
- BF Block of Memory Fill BF 17
- BS Block of Memory Search BS 19
- BM Block of Memory Move BM 19
- BR Breakpoint Insert BR 20
- BV Block of Memory Verify BV 21
- DU Dump S-Records DU 23
- DC Data Conversion DC 23
- GN Go To Next Instruction GN 25
- GO Go Execute User Program GO 27
- HE Help HE 29
- MA Macro Define/Display MA 31
- MAE Macro Edit MAE 33
- MM Memory Modify MM 35
- MD Memory Display MD 36
- MS Memory Set MS 38
- PF Port Format PF 39
- PA Printer Attached PA 40
- RD Register Display RD 41
- RS Register Set RS 43
- RESET Cold/Warm Reset RESET 44
- RM Register Modify RM 44
- T Trace T 45
- SD Switch Directories SD 45
- TM Transparent Mode TM 48
- 4.2SOURCE PROGRAM CODING 51
- CHAPTER 4 52
- ASSEMBLER/DISASSEMBLER 52
- 4.1 INTRODUCTION 52
- 5.2 SYSTEM CALL ROUTINES 57
- CHAPTER 5 58
- SYSTEM CALLS 58
- 5.1 INTRODUCTION 58
- .ERASLN Erase Line .ERASLN 61
- .OUTSTR .OUTSTR 66
- .SNDBRK Send Break .SNDBRK 68
- .TM_RD Read Timer .TM_RD 70
- .WRITELN .WRITELN 71
- .WRITDLN .WRITDLN 71
- 6.3 UTILITIES 73
- CHAPTER 6 73
- DIAGNOSTIC FIRMWARE GUIDE 73
- 6.1 INTRODUCTION 73
- 6.2 DIAGNOSTIC MONITOR 73
- CPU B Instruction Test CPU B 75
- CPU CPU Tests For The MCU CPU 76
- CPU A Register Test CPU A 76
- CPU C Address Mode Test CPU C 77
- MT Memory Tests MT 78
- MT D Set Bus Data Width MT D 79
- MT A Set Function Code MT A 79
- MT B Set Start Address MT B 80
- MT C Set Stop Address MT C 80
- MT H Random Byte Test MT H 81
- MT E March Address Test MT E 81
- MT F Walk a Bit Test MT F 82
- MT G Refresh Test MT G 82
- MT I Program Test MT I 83
- MT J Test and Set Test MT J 84
- BERR Bus Error Test BERR 84
- APPENDIX A 85
- S-RECORD INFORMATION 85
- A.1 INTRODUCTION 85
- A.2 S-RECORD CONTENT 85
- A.3 S-RECORD TYPES 86
- A.4 S-RECORDS CREATION 86
- C.2 CPU32BUG CUSTOMIZATION 87
- APPENDIX B 87
- SELF-TEST ERROR MESSAGES 87
- B.1 INTRODUCTION 87
- APPENDIX C 88
- USER CUSTOMIZATION 88
- C.1 INTRODUCTION 88
- C.3 CUSTOMIZATION TABLE 90
- C.4 COMMUNICATION FORMATS 93
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